1. Field of the Invention
This invention is related to a semiconductor memory device, especially related to a semiconductor memory device capable of performing read operation and write operation simultaneously.
2. Description of the Prior Art
Since the speed of read operations or write operations of the dynamic random access memory (DRAM) is faster than the speed of read operations or write operations of the static random access memory (SRAM) and the circuit structure of the dynamic random access memory is rather simpler, which requires smaller circuit area, the dynamic random access memory has been widely used in all kinds of systems.
However, after the dynamic random access memory performs a read operation, charges stored in the dynamic random access memory may dissipate gradually. Therefore, a rewrite operation for recharging is required. If the rewrite operation is required each time after a read operation, the time for the next read operation of the dynamic random access memory may be delayed, that is, the time required by a whole read operation is increased.
In addition, after the system is powered off, the charges stored in the dynamic random access memory will be dissipated, and the dynamic random access memory is not able to keep storing the data, which can cause inconvenience to the users sometimes. Therefore, how to reduce the time gap between successive read operations for increasing the speed of the whole read operation of the semiconductor memory device, and how to make the semiconductor memory device be capable of maintaining the stored data when the system is powered off while not to increase the circuit area significantly have both become issues of the prior art to be solved.